============================================================ Personal Resume of Dan A. Muresan ============================================================ E-mail: muresan at stanfordalumni.org Web: http://alumnus.caltech.edu/~muresan/ Mail: PO Box 2-95, Bucharest, Romania Tel: +40-74-206-4774 (cell), (888) 343-3164 (US) ============================================================ Education ============================================================ ***** Stanford University (Stanford, California) Master of Science in Electrical Engineering (April 2002) Selected coursework: Digital Communications, Wireless Design, Data Networks, Adaptive Filtering, Neural Networks, Nonlinear and Hybrid Systems, Convex Optimization, Database System Implementation, Syntax, Semantics Research: invented a globally optimal scalar quantizer design method. The method applies to scalar quantizers, multiple description quantizers, multi-resolution quantizers (all with or without side-information), has polynomial complexity, and is based on the rate-distortion framework. The method has been described in two papers at the 2002 Data Compression Conference (DCC), Snowbird, Utah, as well as in US patent no. 6771831 ***** California Institute of Technology (Caltech) (Pasadena, California) Bachelor of Science with Honors, Engineering and Applied Science (05/99) Selected coursework: Digital Signal Processing, Wireless Communications, Information Theory, Coding Theory, Machine Learning, Computer Graphics, Cryptography, Corporate Finance, Investment Theory, Economic Decision Theory Research: * Image compression with generalized wavelets packets (M. Effros, D. Muresan, 02/98 - 05/99). The concept (meaning tree-like filter banks that combine different wavelet filters) is original and has produced better compression for some images. Developed models, scripts, C++ simulation, and Java visualization software. * Measuring the randomness of turbo code interleavers (J. McEliece, D. Muresan, 01/98 - 05/98). Solved combinatorial problems related to turbo codes. Teaching: * Teaching Assistant (TA) for "Computation and computers" sophomore-level class (CS department, academic year 1998-1999) * TA for "Information Theory" class (EE department, Q1/98). ***** Bucharest Polytechnic University (Bucharest, Romania) First year of a five-year program in Computer Science. Transferred to Caltech in Fall 1996. ============================================================ Experience ============================================================ ***** Freescale Semiconductor, Romania (since May 2006) * Joined Freescale Semiconductor (formerly a Motorola Company) to work on voice and video-over-IP embedded systems ***** Topex Public Switching, R&D Department, Bucharest, Romania (10/2002 - 05/2006) * Project manager for E1 to VoIP gateway featuring a dedicated Mindspeed VoIP processor. The product scales to hundreds of simultaneous voice channels and integrates open source and proprietary solutions on a proprietary hardware platform. * Implemented the SIP stack for VoIP gateways. * Implemented the IP communication protocol between the 112 Romanian emergency telecommunications system and Topex radio gateways. * Contributed to the NIST JAIN SIP open source project (a Java SIP stack specified by JSR 32 and implemented by a team from the US National Institute for Standards and Technology). * Developed FifoEmbed, a lock-free queue, packet queue and FIFO allocator library (see Publications) used in several embedded applications. The C abstract data types support concurrent, lock-free access by one producer and one consumer thread. The allocator provides constant-time operation for first-in first-out access patterns. FifoEmbed is now available from Sourceforge (http://fifoembed.sf.net). * Developed an 8-channel RTP mixer / mini-PBX on an ADSP-2191 EZ-Kit development board augmented with a Rabbit 2000 extension board. The board could be controlled using a Java-based GUI. Developed and implemented a proprietary lossless audio compression scheme. * Implemented an ADSP-2181 audio echo canceller for a custom communications system. * Developed a POSIX Threads compatibility layer for Analog Devices' VDK kernel. ***** Part-time: Hexpair.com, Omnigia.com * Created Hexpair.com, an independent software vendor and member of the Analog Devices DSP Collaborative * Created and marketed ASM Scope (www.hexpair.com/asmscope), a static code analysis and program understanding tool for Analog Devices assembly language. This tool automatically extracts subroutines from assembly language listings, produces call graphs, and analyzes register usage for arbitrary snippets of code. * Developed Scheme Cad (www.omnigia.com/SchemeCad), a 3D CAD tool programmable in Scheme (currently supports wireframe models and features animation) * Created several web applications: Depicter.com, a web-based vector graphics editor implemented in pure DHTML; Word Strands, an online AJAX word game; Folk Grid, a social networking engine. * Released DPFW, a light-weight distributed programming framework in Scheme (www.call-with-current-continuation.org/eggs/dpfw.html) * Other products worked on include program transformation tools and natural language interfaces. ***** Multidigit Inc., Palo Alto, Calif. (12/2001-03/2002) Developed first machine vision-based prototype of a novel user interface allowing differential finger input. Wrote C++ and Matlab computer vision software. ***** Electromontaj S.A, Bucharest, Romania (Summer 1992) Developed transmission line tower design software, automating a process previously involving long pen-and-paper calculations. The software is still in use and "has greatly reduced design time, as well as enabled the use of a more detailed optimization method that produced leaner, cheaper structures" ============================================================ Publications ============================================================ * "Quantization as Histogram Segmentation: Globally Optimal Scalar Quantizer Design in Network Systems" (Dan Muresan, Michelle Effros). US patent no. 6771831 * "Codecell contiguity in Optimal Fixed-Rate and Entropy-Constrained Network Scalar Quantizers" (M. Effros, D. Muresan) * "FifoEmbed: a lock-free queue, packet queue and FIFO allocator library" (D. Muresan). C/C++ Users Journal, October 2004. ============================================================ Awards, affiliations, qualifications ============================================================ * Tau Beta Pi member * Two Caltech Merit Awards (1/3, 2/3 tuition respectively) * First prize in 1996 Scientific Seminar Series at the Bucharest Polytechnic University * Certified Analog Devices Blackfin FAE (Field Application Engineer) ============================================================ Skills ============================================================ * Data, voice and image compression technology * Signal / image processing, digital filter design, wavelets * Telephony and VoIP technology (audio codecs, RTP, H323 and SIP, ISDN) * Embedded systems: worked with several real-time kernels (uC/OS, eCos, RTEMS, VDK) as well as systems with no kernel, on several architectures (x86, ARM, Analog Devices DSPs, Motorola M68k, Z80, Rabbit). Experienced with Linux, Windows, Cygwin cross-development. * Programming: C/C++ (15 years, ranging from 8-bit embedded programming to template/generic programming), Java (J2SE, J2ME, J2EE), Lisp / Scheme, Prolog, OCaml, Haskell, assembly (Intel x86, Motorola M68k, Analog Devices DSPs, Z80, Rabbit), Javascript, Python, Perl, Tcl / Tk, Bourne shell * Web programming: AJAX / DHTML, JSP / servlets, PHP, Perl, CGI, Echo framework, SISCweb * Compiler construction, parsers / lexers; Java code transformation (with the Eclipse JDT) * Multi-threaded programming * Mathematical finance, automated trading systems * Tools: very experienced with version control (cvs, subversion, darcs), bug trackers (Bugzilla, Trac), code checkers (lint, valgrind, EF), build tools (ant, make), Doxygen, emacs, jEdit.